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application note 1 of 12 www.xicor.com june, 2000 AN80 interfacing the x5043 watchdog timer to hitachi h8/3000 microcontrollers by applications staff the following code demonstrates how the xicor x5043 spi serial eeprom and watchdog timer could be inter- faced to the hitachi h8/3000 microcontroller family when connected as shown in figure 1. the interface uses four of the port pins available on h8 family devices to implement the interface. figure 1. typical hardware connection for interfacing an x5043 to the h8/3042 microcontroller
2 of 12 AN80 application note www.xicor.com june, 2000 11 .h8300h .file "h8x25043.asm" ; h8x25043.asm ; demonstration code for interfacing xicor x5043 to hitachi h8/3042 ; revision: 2.03 02/04/96 ; expects the h8/3042 hard-wired in mode 1: 8-bit bus-width, expanded address ; space (0x00000-0xfffff), internal rom disabled, internal ram enabled ; (0xff710-0xfff0f), 9.8304 mhx xtal .include "h8stddef.inc" ; h8/3042 standard register definitions ; h8/3042 specific equates .equ h8ramtop, 0xfff0f ; highest onboard ram address (2048 bytes) .equ h8rambot, 0xff710 ; lowest onboard ram address .equ rxd0, bit_2 ; receive data pin of port/sci .equ intmask, 0b11000000 ; ccr interrupt mask (i and ui bits) ; xicor x5043 device-specific equates .equ cs, bit_0 ; port bit for chip select input (h8 out) .equ si, bit_1 ; port bit for serial data input (h8 out) .equ sck, bit_2 ; port bit for serial clock input (h8 out) .equ so, bit_3 ; port bit for serial data output (h8 in) .equ wp, bit_4 ; port bit for write protect input (h8 out) .equ xicor, pbdr ; h8/3042 data port assignment (pb) .equ xicorddr, pbddr ; h8/3042 data direction port assignment .equ ddrsetup, 0b11110111 ; port data direction register setup .equ wren, 0x06 ; write enable latch instruction .equ wrdi, 0x04 ; write disable latch instruction .equ wrsr, 0x01 ; write status register instruction .equ rdsr, 0x05 ; read status register instruction .equ write, 0x02 ; write memory instruction .equ read, 0x03 ; read memory instruction .equ statusreg, 0x00 ; status register .equ wipbit, bit_0 ; write in progress status bit .equ addrbit, bit_3 ; read/write instruction address msb .equ pagesize, 4 ; bytes per page .equ numpages, 128 ; number of pages in x25043 .equ numbytes, numpages*pagesize ; number of bytes in x25043 .equ maxpolls, 100 ; maximum number of poll attempts for wip ; main equates .equ stacktop, h8ramtop-4 ; stack initializes here and builds down .equ allones, 0b11111111 ; all bits set .equ bigwrite, 70 ; test number of bytes to write
3 of 12 AN80 application note www.xicor.com june, 2000 .equ rambfr0, h8rambot ; start of read/write buffer in on-board ram .equ rambfr1, h8rambot+pagesize ; second read/write buffer .equ rambfr2, rambfr1+bigwrite ; third read/write buffer .equ databyte0, 0xf0 ; test byte 0 .equ databyte1, 0x0f ; 1 .equ databyte2, 0x55 ; 2/power-up flag .equ databyte3, 0xaa ; 3/ .equ pwrupflgs, 256*databyte3+databyte2 ; 0xaa55 .equ xaddrb, 45 ; test byte write/read address .equ xaddrp, 200 ; test page write/read address .equ xaddrbp, 0x195 ; test block protect read/write address .equ xaddrbw, 0x037 ; eeprom bigwrite destination .equ h8ramloc0, h8rambot+1047 ; power-up ram test location 0 .equ h8ramloc1, h8rambot+1597 ; 1 ; start of code ; .org 0x00000 ; h8/3042 interrupt vector jump table ; must reside at address 0x00000 .long 0x00000100 ; 0 reset .long _bogus_int ; 1 reserved .long _bogus_int ; 2 reserved .long _bogus_int ; 3 reserved .long _bogus_int ; 4 reserved .long _bogus_int ; 5 reserved .long _bogus_int ; 6 reserved .long _bogus_int ; 7 external interrupt (nmi) .long _bogus_int ; 8 trap instruction (4 sources) .long _bogus_int ; 9 trap instruction (4 sources) .long _bogus_int ; 10 trap instruction (4 sources) .long _bogus_int ; 11 trap instruction (4 sources) .long _bogus_int ; 12 external interrupt irq0 .long _bogus_int ; 13 external interrupt irq1 .long _bogus_int ; 14 external interrupt irq2 .long _bogus_int ; 15 external interrupt irq3 .long _bogus_int ; 16 external interrupt irq4 .long _bogus_int ; 17 external interrupt irq5 .long _bogus_int ; 18 reserved .long _bogus_int ; 19 reserved .long _bogus_int ; 20 wovi watchdog timer .long _bogus_int ; 21 cmi refresh controller .long _bogus_int ; 22 reserved .long _bogus_int ; 23 reserved .long _bogus_int ; 24 imia0 gra0 compare match/input capture .long _bogus_int ; 25 imib0 grb0 compare match/input capture .long _bogus_int ; 26 ovi0 overflow 0 .long _bogus_int ; 27 reserved .long _bogus_int ; 28 imia1 gra1 compare match/input capture .long _bogus_int ; 29 imib1 grb1 compare match/input capture .long _bogus_int ; 30 ovi1 overflow 1 .long _bogus_int ; 31 reserved .long _bogus_int ; 32 imia2 gra2 compare match/input capture .long _bogus_int ; 33 imib2 grb2 compare match/input capture .long _bogus_int ; 34 ovi2 overflow 2 .long _bogus_int ; 35 reserved
4 of 12 AN80 application note www.xicor.com june, 2000 .long _bogus_int ; 36 imia3 gra3 compare match/input capture .long _bogus_int ; 37 imib3 grb3 compare match/input capture .long _bogus_int ; 38 ovi3 overflow 3 .long _bogus_int ; 39 reserved .long _bogus_int ; 40 imia4 gra4 compare match/input capture .long _bogus_int ; 41 imib4 grb4 compare match/input capture .long _bogus_int ; 42 ovi4 overflow 4 .long _bogus_int ; 43 reserved .long _bogus_int ; 44 dend0a dmac group 0 .long _bogus_int ; 45 dend0b dmac group 0 .long _bogus_int ; 46 dend1a dmac group 0 .long _bogus_int ; 47 dend1b dmac group 0 .long _bogus_int ; 48 reserved .long _bogus_int ; 49 reserved .long _bogus_int ; 50 reserved .long _bogus_int ; 51 reserved .long _bogus_int ; 52 eri0 receive error sci chan 0 .long _bogus_int ; 53 rxi0 receive data full sci chan 0 .long _bogus_int ; 54 txi0 transmit data empty sci chan 0 .long _bogus_int ; 55 tei0 transmit end sci chan 0 .long _bogus_int ; 56 eri1 receive error sci chan 1 .long _bogus_int ; 57 rxi1 receive data full sci chan 1 .long _bogus_int ; 58 txi1 transmit data empty sci chan 1 .long _bogus_int ; 59 tei1 transmit end sci chan 1 .long _bogus_int ; 60 adi a/d end _bogus_int: orc #0b11000000,ccr ; disable interrupts (i and ui) rte ; .org 0x000100 _powerup: ; initialization orc #intmask,ccr ; disable interrupts (i and ui) mov.l #stacktop,er7 ; initialize the stack pointer bsr _init_xiport:16 ; initialize the x25043 i/o port bset #wp,@xicor ; write protect line high to enable x25043 ; writes bsr _wren_cmnd:16 ; enable writing to the x25043 to ... mov.b #0b00110000,r0l ; setup to disable the wdt bsr _wrsr_cmnd:16 ; ... and do so! _main: mov.l #h8ramloc0,er1 ; point to power-up flag location 0 mov.b @er1,r0l ; ... and fetch the flag mov.l #h8ramloc1,er2 ; ... the other flag, location 1 mov.b @er2,r0h ; ... fetch it mov.w #pwrupflgs,r3 ; setup flag compare (and re-write) mov.b r3l,@er1 ; store first flag mov.b r3h,@er2 ; ... and the second ; (we've powered-up or reset) cmp.w r0,r3 ; has the wdt brought us here? beq _skip_wdt ; yes, skip the watch dog timer exercise
5 of 12 AN80 application note www.xicor.com june, 2000 ; exercise the x5043 watch dog timer one time bsr _wren_cmnd:16 ; no, enable writing to the x5043 mov.b #0b00100000,r0l ; setup the wdt for 200ms bsr _wrsr_cmnd:16 ; ... and enable it _wdt_delay: mov.w #30788,r3 ; setup loop count (100ms @9.8304mhz) _wdtdly_loop: dec.w #1,r3 ; crank the counter bne _wdtdly_loop ; done? bsr _wdog_reset:16 ; kick the dog (verifies wdt reset) _wdt_wait: bra _wdt_wait:16 ; spin here until wdt kicks back to reset ; skip the watch dog timer ... done once, now byte read/write exercise _skip_wdt: xor.b r0l,r0l ; setup null byte to clear power-up flags mov.l #h8ramloc0,er1 ; point to power-up flag location 0 mov.b r0l,@er1 ; ... and clear the flag mov.l #h8ramloc1,er1 ; ... the other flag, location 1 mov.b r0l,@er1 ; ... and clear it (now reset recycles wdt) bsr _rdsr_cmnd:16 ; read the x5043 status register bsr _wren_cmnd:16 ; enable writing to the x5043 mov.b #databyte0,r0l ; setup data for single byte write mov.w #xaddrb,r1 ; setup x5043 target address bsr _byte_write:16 ; ... and write it mov.w #xaddrb,r1 ; setup x5043 source address bsr _byte_read:16 ; ... and fetch it! bsr _wren_cmnd:16 ; enable writing to the x5043 mov.b #databyte1,r0l ; setup data for single byte write mov.w #xaddrb,r1 ; setup x5043 target address bsr _byte_write:16 ; ... and write it mov.w #xaddrb,r1 ; setup x5043 source address bsr _byte_read:16 ; ... and fetch it! ; page read/write exercise bsr _wren_cmnd:16 ; enable writing to the x5043 mov.w #xaddrp,r1 ; setup x5043 target page address mov.l #_dataset0,er2 ; point to source data bsr _page_write:16 ; ... and write the page mov.w #xaddrp,r1 ; again, setup x5043 source page address mov.l #rambfr0,er2 ; point to destination buffer in onboard ram mov.w #pagesize,e1 ; setup byte read count bsr _read_seq:16 ; ... and read the page ; sequential read/write exercise xor.w r0,r0 ; initialize byte sequence (0->bigwrite-1) mov.l #rambfr1,er2 ; ... and point to the destination _bigwr_setup: mov.b r0l,@er2 ; store a byte in the ram buffer inc.l #1,er1 ; bump pointer to next ram location inc.w #1,r0 ; count bytes stored/generate next byte
6 of 12 AN80 application note www.xicor.com june, 2000 cmp.w #bigwrite,r0 ; have we done 'em all? blt _bigwr_setup ; no, continue mov.w #bigwrite,e1 mov.w #xaddrbw,r1 mov.l #rambfr1,er2 ; setup x5043 'big write' (count is in e1) bsr _wren_cmnd:16 ; enable writing to the x5043 bsr _write_seq:16 ; ... and write 'em mov.w #bigwrite,e1 ; setup to read 'em back! mov.w #xaddrbw,r1 mov.l #rambfr2,er2 bsr _read_seq:16 ; block protect exercise bsr _wren_cmnd:16 ; enable writing to the x5043 mov.b #0b00110100,r0l ; setup block protect upper quarter (0x180+) bsr _wrsr_cmnd:16 ; ... and protect it mov.w #xaddrbp,r1 ; setup x25043 source address (protected) bsr _byte_read:16 ; ... and fetch it! not.b r0l ; one's complement, for re-write verify mov.b r0l,r1l ; temporarily preserve it bsr _wren_cmnd:16 ; enable writing to the x5043 mov.b r1l,r0l ; recover data for single byte write mov.w #xaddrbp,r1 ; setup x5043 target address (protected) bsr _byte_write:16 ; ... and write it mov.w #xaddrbp,r1 ; setup x5043 source address bsr _byte_read:16 ; ... and fetch it! _end_loop: bra _end_loop ; terminal infinite loop ; x25043 interface subroutines ; name: _init_xiport ; function: initializes the h8 i/o port bit directions ; calls: none ; expects: nothing ; returns: nothing ; registers: r0l ; remarks must be called once initially to setup the i/o port _init_xiport: mov.b #ddrsetup,r0l mov.b r0l,@xicorddr bset #cs,@xicor ; chip select disable x5043 bclr #si,@xicor ; drop serial input to x5043 bclr #sck,@xicor ; drop the clock sck bclr #wp,@xicor ; write protect line low, disable writes rts ; name: _wren_cmnd ; function: sends the command to enable writing to the xicor x5043 eeprom ; calls: _send_byte
7 of 12 AN80 application note www.xicor.com june, 2000 ; expects: nothing ; returns: nothing ; registers: r0l ; remarks: _wren_cmnd: bclr #sck,@xicor ; sck low bclr #cs,@xicor ; cs low mov.b #wren,r0l ; setup write enable instruction bsr _send_byte:16 bclr #sck,@xicor ; sck low bset #cs,@xicor ; cs high rts ; name: _wrdi_cmnd ; function: sends the command to disable writing to the xicor x5043 eeprom ; calls: _send_byte ; expects: nothing ; returns: nothing ; registers: r0l ; remarks: _wrdi_cmnd: bclr #sck,@xicor ; sck low bclr #cs,@xicor ; cs low mov.b #wrdi,r0l ; setup write disable instruction bsr _send_byte:16 bclr #sck,@xicor ; sck low bset #cs,@xicor ; cs high rts ; name: _wrsr_cmnd ; function: sends the command which enables writing to the wd0, wd1, bp0 and ; bp1 bits of the xicor x5043 eeprom status register ; calls: _send_byte, _poll_write ; expects: block protect/watchdog timer bits in r0l ; returns: nothing ; registers: r0l, e0 ; remarks: _wrsr_cmnd: mov.w r0,e0 ; temporarily preserve wdt/bp bits bclr #sck,@xicor ; sck low bclr #cs,@xicor ; cs low mov.b #wrsr,r0l ; setup write status register instruction bsr _send_byte:16 mov.w e0,r0 ; recover wdt/bp bits bsr _send_byte:16 bclr #sck,@xicor ; sck low bset #cs,@xicor ; cs high bsr _poll_write:16 rts ; name: _rdsr_cmnd ; function: sends the command which reads the contents of the xicor x5043 ; eeprom status register
8 of 12 AN80 application note www.xicor.com june, 2000 ; calls: _send _byte, _recv_byte ; expects: nothing ; returns: status in r0l ; registers: r0l ; remarks: _rdsr_cmnd: bclr #sck,@xicor ; sck low bclr #cs,@xicor ; cs low mov.b #rdsr,r0l ; setup read status register instruction bsr _send_byte:16 bsr _recv_byte:16 bclr #sck,@xicor ; sck low bset #cs,@xicor ; cs high rts ; name: _byte_write ; function: writes a single byte to the xicor x5043 eeprom memory array ; calls: _send_byte, _poll_write ; expects: byte to be sent in r0l, address in r1 (0x0000-0x01ff) ; returns: nothing ; registers: r0l, r1, e0 ; remarks: _byte_write: bclr #sck,@xicor ; sck low bclr #cs,@xicor ; cs low mov.w r0,e0 ; temporarily preserve the byte mov.b #write,r0l ; setup write instruction rotr.b r1h ; rotate the address msb into carry bst #addrbit,r0l ; stuff it bsr _send_byte:16 mov.b r1l,r0l ; fetch address ls byte bsr _send_byte:16 mov.w e0,r0 ; recover the byte bsr _send_byte:16 bclr #sck,@xicor ; sck low bset #cs,@xicor ; cs high bsr _poll_write:16 rts ; name: _byte_read ; function: reads a single byte from the xicor x5043 eeprom memory array ; calls: _send_byte, _recv_byte ; expects: serial eeprom byte address in r1 (0x0000-0x01ff) ; returns: byte read in r0l ; registers: r0l, r1, e0 ; remarks: _byte_read: bclr #sck,@xicor ; sck low bclr #cs,@xicor ; cs low mov.b #read,r0l ; setup read instruction rotr.b r1h ; rotate the address msb into carry
9 of 12 AN80 application note www.xicor.com june, 2000 bst #addrbit,r0l ; stuff it bsr _send_byte:16 mov.b r1l,r0l ; fetch address ls byte bsr _send_byte:16 ; ... and send it bsr _recv_byte:16 ; receive byte from eeprom bclr #sck,@xicor ; sck low bset #cs,@xicor ; cs high rts ; name: _page_write ; function: sends a full page (4 bytes) to the xicor x5043 eeprom ; calls: _send_byte, _poll_write ; expects: serial eeprom destination starting address in r1, pointer to ; source bytes (4) in er2 ; returns: nothing ; registers: r0l, r0h, r1, er2 ; remarks: _page_write: bclr #sck,@xicor ; sck low bclr #cs,@xicor ; cs low mov.b #write,r0l ; setup write instruction rotr.b r1h ; rotate the address msb into carry bst #addrbit,r0l ; stuff it bsr _send_byte:16 mov.b r1l,r0l ; fetch address ls byte and.b #0b11111100,r0l ; mask drivel to page boundary bsr _send_byte:16 mov.b #pagesize,r3l _page_wrloop: mov.b @er2+,r0l ; fetch byte to send, point to next one bsr _send_byte:16 dec.b r3l ; click off another sent byte bne _page_wrloop bclr #sck,@xicor ; sck low bset #cs,@xicor ; cs high bsr _poll_write:16 rts ; name: _read_seq ; function: reads a sequence of bytes from the xicor x5043 serial eeprom ; calls: _send_byte, _recv_byte ; expects: eeprom source starting address in r1 (0x0000-0x01ff), count of ; bytes to read in e1, pointer to start of destination storage in er2 ; returns: byte array read in memory ; registers: r0l, r0h, r1, e1, er2 ; remarks: _read_seq: bclr #sck,@xicor ; sck low bclr #cs,@xicor ; cs low mov.b #read,r0l ; setup read instruction rotr.b r1h ; rotate the address msb into carry bst #addrbit,r0l ; stuff it bsr _send_byte:16
10 of 12 AN80 application note www.xicor.com june, 2000 mov.b r1l,r0l ; fetch address ls byte bsr _send_byte:16 _read_seqloop: bsr _recv_byte:16 mov.b r0l,@er2 ; store eeprom byte into memory inc.l #1,er2 ; point to next storage location dec.w #1,e1 ; click off another byte read bne _read_seqloop bclr #sck,@xicor ; sck low bset #cs,@xicor ; cs high rts ; name: _write_seq ; function: writes a sequence of bytes to the xicor x5043 serial eeprom ; calls: _send_byte, _poll_write, _wren_cmnd ; expects: eeprom destination starting address in r1 (0x0000-0x01ff), count of ; bytes to write in e1, pointer to start of source storage in er2 ; returns: nothing ; registers: r0l, r0h, r1, e1, er2, r3, e3 ; remarks: takes advantage of page write mode to minimize write times _write_seq: bclr #sck,@xicor ; sck low bclr #cs,@xicor ; cs low mov.w r1,e3 ; preserve eeprom destination address mov.b #write,r0l ; setup write instruction rotr.b r1h ; rotate the address msb into carry bst #addrbit,r0l ; stuff it bsr _send_byte:16 mov.b r1l,r0l ; fetch address ls byte bsr _send_byte:16 _write_seqloop: mov.b @er2+,r0l ; fetch byte to write & point to next one bsr _send_byte:16 dec.w #1,e1 ; click off another byte written inc.w #1,e3 ; point to next destination address mov.w e3,r3 ; ... and scratchpad it and.b #0b00000011,r3l ; keep destination address page bits beq _wrseq_pagend ; '00' means prior address was page end or.w e1,e1 ; is the byte count zero? bne _write_seqloop ; no, continue with this page bclr #sck,@xicor ; sck low bset #cs,@xicor ; cs high bsr _poll_write:16 rts _wrseq_pagend: bclr #sck,@xicor ; sck low bset #cs,@xicor ; cs high bsr _poll_write:16 ; is the write still in progress in eeprom? or.w e1,e1 ; is the byte count zero? beq _wrseq_done ; yes, we're done bsr _wren_cmnd:16 ; no, more to do so re-enable writing mov.w e3,r1 ; recover next eeprom address as expected bra _write_seq ; back to the eeprom _wrseq_done:
11 of 12 AN80 application note www.xicor.com june, 2000 rts ; name: _send_byte ; function: sends a byte to the xicor x5043 eeprom, serially shifting msb ; first ; calls: none ; expects: byte to be sent in r0l ; returns: nothing ; registers: r0l, r0h ; remarks: _send_byte: mov.b #8,r0h ; setup bit count _send_loop: bclr #sck,@xicor ; sck low rotxl.b r0l ; slip next msb into carry bst #si,@xicor ; copy carry to i/o port bit bset #sck,@xicor ; sck high dec.b r0h ; click off a bit bne _send_loop ; continue if not done bclr #si,@xicor ; si low rts ; name: _recv_byte ; function: receives a byte from the xicor x5043 eeprom, serially shifting msb ; first ; calls: none ; expects: nothing ; returns: received byte in r0l ; registers: r0l, r0h ; remarks: _recv_byte: mov.b #8,r0h ; setup bit count _recv_loop: bset #sck,@xicor ; sck high nop nop nop ; guarantee limited clock rate bclr #sck,@xicor ; sck low bld #so,@xicor ; copy input port bit to carry rotxl.b r0l ; slip carry into lsb dec.b r0h ; click off a bit bne _recv_loop ; continue if not done rts ; name: _poll_write ; function: polls for the completion of the non-volatile write cycle by ; examining the write-in-progress bit of the status register ; calls: _rdsr_cmnd ; expects: nothing ; returns: nothing ; registers: r1l ; remarks:
12 of 12 AN80 application note www.xicor.com june, 2000 _poll_write: mov.b #maxpolls,r1l ; setup maximum number of poll attempts _poll_loop: bsr _rdsr_cmnd:16 ; fetch the x5043 status register content btst #wipbit,r0l ; is the write-in-progress bit zero? beq _poll_loop1 ; yes, write is complete dec.b r1l ; no, click off another poll attempt bne _poll_loop ; if we haven't exceeded maximum polls ... _poll_loop1: rts ; name: _wdog_reset ; function: resets the watchdog timer ; calls: none ; expects: nothing ; returns: nothing ; registers: none ; remarks: _wdog_reset: bclr #cs,@xicor nop nop nop bset #cs,@xicor rts ; data tables .align 0 _dataset0: .byte databyte0 .byte databyte1 .byte databyte2 .byte databyte3

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